Metal oxide semiconductor (MOS) transistors and similar insulated gate monopolar devices can be grouped as either enhancement-mode or depletion-mode devices. Depletion-mode devices inherently include a pair of P/N junctions which form a parasitic bipolar transistor. In most applications, it is imperative that the parasitic transistor not turn on during operation of the monopolar device, otherwise switching speed of the device is degraded.
Recently developed insulated gate conductivity modulated devices also have an inherent parasitic bipolar transistor which must be prevented from turning on. The devices include a MOS transistor which provides base drive to a non-parasitic bipolar transistor. In the event the parasitic transistor does turn on, the primary bipolar device will become latched in the on state which, in most applications, will result in destruction of the device.
Attempts have been made to minimize the likelihood that the parasitic transistor will become turned on. Typically, the source electrode of the MOS device shorts the source to the body region of the device. This effectively shorts the base and emitter of the parasitic transistor together at the surface of the device. However, because of series resistance in the device body, other portions of the base and emitter are not shorted, but rather have a relatively high impedance bridging the two elements. A highly doped region can be added to reduce the effective resistance of the bridging impedance. However, the highly doped region cannot be located in proximity to the channel region in the body without adversely affecting the breakdown voltage of the device. Accordingly, there remains a significantly high resistance which permits the parasitic transistor to be turned on under certain operating conditions.
The present invention overcomes the above-noted limitations of conventional insulated gate semi-conductor devices. The effective resistance between the emitter/base of the parasitic transistor is reduced substantially without degrading breakdown voltage performance. In addition, a ballast voltage is generated in the device which opposes the voltage tending to turn on the parasitic transistor. In addition, the dimensions of the device are significantly smaller than those of conventional devices so that production yields per wafer are increased. These and other advantages of the present invention will become apparent to those skilled in the art upon a reading of the following Best Mode For Carrying Out The Invention together with the drawings.